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Monitoring downstream particles in a single-wafer CVD oxide reactor on ResearchGate, the professional network for scientists. Numerical Simulation of Sili
Beamforming Lens Antenna on a High Resistivity Silicon Wafer for 60 GHz Woosung Lee,Jaeheung Kim,Choon Sik Cho,Young Joong Yoon,
Oxide Thickness Measurement of CMP Test Wafer by Dispersive White-light InterferometryPark, BoumYoungKim, YoungJinJeong, HaeDoGhim, YoungSik
Defect Engineering During Czochralski Crystal Growth and Silicon Wafer Jan SikVálek, L. and Šik, J. (2012) Defect Engineering during
Selective Epitaxial Growth of Silicon Layer Using to be less than 100 in 200-mm wafers. SeokSik KimHongSik JeongChangJin KangJooTae Moon
near-infrared imaging devices on wafers of silicon, and photovoltaic modulesYoon, Jongseung, Sungjin Jo, lk Su Chun, lnhwa Jung, Hoon-Sik Kim,
WAFER-LEVEL PACKAGINGElectrically Conductive Adhesives (ICAs: Isotropic ConductiveKyoung-sikMoonKyung WookPaikC. P.Wong《Journal of Adhesion Science
A wafer level chip scale package may have a gap provided between a Chung, Jae-sikSim, Sung-minJang, Dong-hyeonSong, Young-heeRyu, Seung-
20181013-The polymer blend was cast on a glass plate (for flat membranes) or on a custom made, micropatterned silicon wafer for the creation of the d
Silicon wafer drilling using Picosecond laser ablationNoh, JiWhanSohn, HyonKeeShin, DongSikPaik, ByoungManSuh, JeongLee, JaeHoon
Intermediate Insulating Buffer Layer to Reduce Stress for Semiconductor WaferChoi, DaesikChoi, JoonyoungKwon, Wonil